Benelux RF&IC Conference 2026 - Bits&Chips Events

PhD pitch submission

×

Anouk Hubrechsen (Antennex)

Recent advances in reverberation chamber measurement techniques: from noise figure to radar waveform characterization

×

Reverberation chambers (RCs) have evolved beyond traditional electromagnetic compatibility testing into versatile measurement platforms. This talk surveys the latest published measurement methodologies that expand the RC’s application space. It addresses recent developments in cascaded noise-figure determination, accelerated power spectral density measurements, waveform characterization of radar signals in reverberant environments, and spatially resolved measurements that extract localized field information.
Together, these advances expand the use cases for reverberation chambers, enabling them to serve more roles in the characterization and testing of modern wireless and radar systems. This will lead to them complementing and, in many cases, outperforming traditional anechoic methods, expanding and enhancing the RF engineer’s toolkit.

Anouk Hubrechsen received the MSc and PhD degrees in electrical engineering from Eindhoven University of Technology, the Netherlands, in 2019 and 2023, respectively. Her research is focused on antenna measurements in reverberation chambers, which has led to the founding of the company Antennex, where she has been CEO since 2022. She was a guest researcher with the National Institute of Standards and Technology, USA, in 2019, where she was involved in reverberation chamber metrology for Internet of Things applications.

Marc Vanden Bossche (CNRood)

From conductive components to phased array antennas: consistent, fast and accurate characterization techniques of nonlinear distortions

×

Phased arrays are now essential building blocks in most communications and sensing applications. Meanwhile, there’s also a trend toward larger signal bandwidths, to carry more information, improve sensing resolution and/or to reduce detection vulnerability.
However, phased array systems and applications face a significant challenge. Their performance is affected by the nonlinear behavior of the active electronics behind the antennas, spurious emissions and noise. Characterizing these behaviors is particularly challenging due to the coupling effects of integrated antennas. These result in hard-to-predict outcomes when radiating in different directions.
This talk demonstrates in steps how nonlinear behavior can be characterized consistently from conductive devices to phased array antenna systems. You’ll leave thinking that the characterization of phased arrays is just as simple (if not simpler) than conductive testing and can be done quickly.

Marc Vanden Bossche holds a PhD (1990) from Vrije Universiteit Brussel (VUB) in electrical engineering, focusing on the foundations of high-frequency large-signal network analysis. That same year, he established an HP R&D team to further develop the technology, ultimately leading to the spinoff NMDG (2002). Following its acquisition by National Instruments (2012), he drove vector calibration and wideband modulation measurements for semiconductor production testers, becoming technical lead for wideband and over-the-air characterization. Since the beginning of last year, he has worked as an RF characterization expert for Antennex, where he brings decades of hands-on expertise and helps bridge the gap between conductive and OTA measurements. Beyond this role, he serves as industrial advisor for the RF team at VUB’s ELEC department. He gives this talk on behalf of CNRood.

Wim Kruiskamp (Renesas)

Rethinking the crystal oscillator: faster startup and fully differential operation

×

Crystal oscillators quietly sit at the heart of almost every wireless device. Yet, their classic implementation has hardly changed in decades. The well-known Pierce oscillator does the job, but its startup is slow and energy-inefficient, and it’s sensitive to common-mode disturbance – all things modern IoT and wireless systems can no longer afford.
In this talk, we explore a different approach: a fully differential crystal oscillator that uses switched capacitors to inject energy exactly when the crystal needs it. The result is an oscillator that starts up almost instantly, rejects common-mode interference by design and runs on very little power. Measured silicon results show that rethinking a seemingly ‘solved’ building block can still deliver substantial gains in startup speed, noise immunity and energy efficiency – with clear benefits for next-generation wireless designs.

Wim Kruiskamp is a distinguished member of technical staff at Renesas in ’s-Hertogenbosch, with over thirty years of experience in analog and mixed-signal circuit design. Throughout his career, he has worked within the same design group, starting at National Semiconductor in 1996 and later transitioning through Sitel and Dialog Semiconductor before becoming part of Renesas, because of acquisitions. He specializes in crystal oscillators, power management and ultra-low-power circuits. He earned his master’s degree from the University of Twente in 1990 and his PhD from Eindhoven University of Technology in 1996.

Chris Lokin (MPS Axign)

Adaptive LC filter compensation in digital class-D amplifiers

×

In post-filter feedback class-D amplifiers, the transfer function of the LC output filter becomes part of the feedback loop. Ideally, the effect of this filter should be canceled. This is done by synthesizing a digital compensation filter with the inverse response and adding it to the feedback loop, netting a flat transfer for the LC output filter and its compensation filter. However, in real-world applications, the component values of the LC output filter are impacted by production spread, making it difficult to get perfect cancellation of the transfer over large production batches. This limits the maximum performance of the feedback loop, because a margin for error has to be taken into account for the component spread. This talk presents an online calibration technique using the least mean squares (LMS) algorithm to continuously estimate the L and C component values of the filter by using the pulse-width modulated (PWM) signal and ADC output bitstreams.

Chris Lokin received the MSc degree in electrical engineering and the PhD degree on active ripple reduction in class-D amplifiers from the University of Twente, the Netherlands, in 2015 and 2023, respectively. In 2020, he joined Axign/MPS, where he’s a systems architect working on class-D audio amplifiers. His current research interests include mixed-signal and control systems for applications in class-D power amplifiers and low-level DSP algorithms.

Lucien Breems (NXP)

Wideband continuous-time ADCs for automotive applications – advances in high-performance ADCs

×

Receivers used in automotive systems like terrestrial broadcast radio and radar-based ADAS depend on wideband analog-to-digital converters that deliver excellent linearity and high spectral purity. The continuous-time sigma-delta modulator fits the automotive receiver requirements very well, thanks to the inherent anti-alias filtering and high-gain feedback loop, but the maximum achievable bandwidth is limited by stability constraints. The continuous-time pipeline ADC architecture doesn’t have this limitation, but its spurious performance depends on the (frequency-dependent) matching accuracy between the analog and digital filters of the pipeline architecture. In this talk, the latest cutting-edge continuous-time sigma-delta and pipeline ADCs are presented that achieve better than 100 dB SFDR in bandwidths up to several hundred MHz. The key architectural innovations, design challenges and calibration techniques are reviewed that enable this extreme performance.

Lucien Breems received the MSc and PhD degrees in electrical engineering from Delft University of Technology in 1996 and 2001, respectively. He’s a fellow at NXP Semiconductors in Eindhoven, the Netherlands, and a part-time professor at TU Delft. He received the ISSCC Jan van Vessem paper award in 2001, 2011 and 2016, the RFIC Symposium industry best paper award in 2016, the ESSERC best paper award in 2024 and the IEEE Journal of Solid-State Circuits best paper award in 2011 and 2016. He’s an IEEE fellow and was an IEEE Distinguished Lecturer from 2012 to 2013.

Eric Leclerc (UMS)

Beyond silicon: III-V technologies powering the next high-linearity, high-power RF and mm-wave revolution

×

UMS will present its latest advances in III‑V semiconductors, highlighting the development of GaN technologies, including our latest GaN GH10 process for high‑frequency, high‑efficiency and robust RF performance. Some application‑driven circuit examples will be shown, including power amplifiers and integrated RF functions designed in‑house and by customers through our foundry services. The talk will emphasize how these technologies enable greater integration density, improved linearity and enhanced power capability, supporting next‑generation high‑frequency RF, microwave and millimeter‑wave systems across defense, space and commercial markets.

Eric Leclerc obtained a research degree in physics in 1984 and a diploma in solid-state physics in 1985 at Paris XI University (Orsay-France). For his PhD, he worked at Thales on GaAs LEC monocrystal growth and defect influences on transistors. He joined United Monolithic Semiconductors (UMS) at its creation in 1996 to work on new III-V power device development, characterization and nonlinear modeling. For several years, he was the company’s foundry service manager. Presently, he’s the field marketing manager, mainly for defense, space, medical applications and foundry.

Tom Van Breussegem (ICsense)

Chips in your brain: challenges a-head!

×

Designing electronics that interface with the human body demands exceptionally reliable, accurate, ultra‑low‑power circuits that often operate under stringent energy constraints while meeting uncompromising safety requirements. Moreover, these implants must often deliver lifetimes that far exceed those expected in consumer and even automotive applications. In collaboration with world‑leading medical implant manufacturers, ICsense has developed wirelessly powered implants that support patients with hearing impairments, epilepsy, chronic cardiac disorders and many other conditions. This talk will highlight the technological advances achieved over the years, explore the multidisciplinary challenges inherent to implantable electronics and offer a forward‑looking perspective on the innovations shaping the next generation of medical ASICs.

Tom Van Breussegem received his PhD from KU Leuven in 2012, specializing in integrated DC–DC converters. He’s currently the analog team lead at ICsense, where he supports a team of 32 analog design engineers. His responsibilities include team organization, design methodology and knowledge consolidation, as well as coordinating learning and development initiatives within the analog group and fostering collaboration with other teams at ICsense, including CAD, digital and AMS. In addition to his leadership role, he serves as an expert in power management, high‑voltage circuit design, ESD and reliability.

Ulrich Lewark (IMST)

Cochisa X – European rad-hard X-band core chip

×

IMST is presenting the measurement results of its new radiation-hard 4-channel TX and 4-channel RX core chip operating in X-band. A scalable layout approach will allow to increase the number of beamforming channels with minimal design effort. The MMIC is designed using IHP’s SG13RH technology and features a vector modulator targeting a 6-bit 360° phase shift and a 6-bit 31.5 dB attenuator. The European Cochisa project frame doesn’t only focus on the IC itself, but also on a cost-effective plastic non-hermetic MMIC packaging process supporting space applications by robust encapsulation. Furthermore, a fully European supply chain for the core chips will be established, based on European foundry and packaging partners.

Ulrich Lewark received the Dipl.-Ing. (MSc) and Dr.-Ing. (PhD) degrees in electrical engineering from the Karlsruhe Institute of Technology (KIT), Germany, in 2010 and 2015, respectively. From 2010 to 2015, he was a research and teaching assistant with the Institut für Hochfrequenztechnik und Elektronik (IHE), KIT, where he was involved in the development of monolithic integrated circuits for radar imaging and broadband communication systems up to sub-millimeter wave range. Since 2015, he’s been with IMST in Kamp-Lintfort, Germany, and since 2017, he’s managed a design team for GaAs, GaN and SiGe MMICs there. The team is covering specialized MMICs for communication and space applications from LNA over PA to complex integrated ICs such as frequency synthesizer and beam former ICs up to 140 GHz.

Mister X (NLR)

Electronic warfare and (counter-)drone operations: understanding the challenges and opportunities

×

This talk explores the intersection of electronic warfare and counter-drone operations, highlighting key challenges and opportunities. It examines the complexities of detecting and neutralizing drone-based threats after setting the scene of the latest evolutions in the area of electronic warfare over the last few years.

Mister X is an electronic-warface RF engineer at NLR, the Netherlands Aerospace Center.

Sofia Perez-Simbor (Rohde & Schwarz)

Next-generation signal and spectrum analyzers: dual-path architecture, integrated cross-correlation and wideband preselection

×

Modern signal and spectrum analyzers face fundamental limitations when measuring wideband, multi-signal and high-dynamic-range RF applications. Conventional work-arounds – IQ averaging for repetitive signals and external cross-correlation with two instruments – provide modest gains but increase complexity and cost. A paradigm shift is proposed: Integrate multiple synchronous input ports, internal cross-correlation and broadband preselection. This architecture simultaneously lifts the noise floor to the physical limit, accelerates wideband sweeps, improves phase noise and spur detection, and simplifies multi-port testing such as phased array antenna and radar communication measurements. In this talk, an overview of the architecture and key applications will be presented.

Sofia Perez-Timbor earned her MSc in telecommunications engineering, specializing in mobile communications, and her PhD in technologies for health and well‑being at the Polytechnic University of Valencia, Spain, within the ITN‑ETN framework. She began her career in the Internet of Things sector, but after three years, transitioned to test and measurement. For the past three years, she’s been an application engineer at Rohde & Schwarz, supporting customers across the Benelux region. In this role, she acts as a technical expert on RF, microwave and signal integrity, delivering guidance, troubleshooting and custom solutions aimed at achieving peak system performance in complex, worldwide applications.

Ioannis Papistas (Axelera AI)

Democratizing AI inference with digital in-memory computing

×

The demand for powerful, efficient and affordable AI inference is outpacing what conventional GPU and CPU architectures can deliver at the edge. Axelera AI addresses this through a combination of digital in-memory computing (D-IMC) and RISC-V controlled dataflow. By performing matrix-vector multiplications directly in memory, the approach eliminates data movement overhead and delivers significantly higher throughput and up to 5x greater efficiency than competing solutions. This talk discusses Axelera’s product family: the production-deployed Metis AIPU (214 TOPS, 15 TOPS/W), the forthcoming Europa AIPU (629 TOPS, ~45 W) and Titania, a D-IMC chiplet architecture targeting HPC and data center inference, developed under the EuroHPC Joint Undertaking.

Ioannis Papistas is a member of the founding team at Axelera and staff engineer within the Full-Custom Design team. He has participated in over ten silicon tape-outs in deep sub-micron technologies and designed and signed off on several digital and full-custom blocks. Prior to Axelera, he was a research engineer at Imec, working on analog in-memory computing accelerators and energy-efficient computing. He received his PhD from the University of Manchester in 2018.

Farid Sahandi Esfanjani (Sioux)

Scalable multi-channel digital downconversion on RFSoC: from single receiver to massive channelization

×

Modern RF systems increasingly demand high channel density, flexibility and rapid reconfiguration – without multiplying hardware complexity. This talk introduces a scalable digital downconverter (DDC) architecture implemented on an RFSoC platform, enabling seamless expansion from a single channel to tens of parallel channels through purely digital scaling. By leveraging the tight integration of RF data converters and programmable logic, the solution combines configurable RF front-end control with a highly modular multi-channel digital processing chain.
The architecture supports dynamic reconfiguration, efficient resource utilization and deterministic real-time performance, making it suitable for radar, satellite communications, spectrum monitoring and multi-beam wireless systems. The talk will cover architectural trade-offs, synchronization strategies, resource scaling considerations and practical implementation insights gained from real hardware deployment.
This work demonstrates how RFSoC platforms can transform traditional receiver design into a software-defined, massively scalable and future-proof RF processing solution.

Farid Sahandi Esfanjani is a senior RF/electronics designer at Sioux Technologies in Eindhoven, specializing in RF and digital system architectures, FPGA-based platforms and high-performance signal processing. He holds an MSc in electrical engineering with a focus on high-speed electronics and RF signal processing. With more than two decades of international experience across Europe and the Middle East, he has led the design and realization of multi-channel RF systems, digital beamforming radar sensors and RFSoC/MPSoC-based architectures. His expertise includes VHDL development and scalable system-level design for advanced communication, radar and high-throughput RF and data processing applications.

Phanish Chava (Admos)

How to measure low frequency noise and why does it matter?

×

Noise is a disturbance variable that affects all electronic components and systems. Electronic circuits with a low signal-to-noise ratio or generally small signal levels, such as those often found in sensor circuits, require special attention when dimensioning. To do this, the noise behavior of the used components, eg transistors, integrated circuits or sensor elements, must be known to the designers at least by measured curves or, in the best case, incorporated into simulation models. To begin with, this talk will take a brief look at the basic types of noise, which include thermal noise, 1/f noise, shot noise and random telegraph noise.
Due to the small signal sizes, measuring noise in the low frequency range poses a particular challenge. The most common concepts for measuring semiconductor components are presented using transistors as an example. Furthermore, the precautions necessary to supply the components with noise-free voltages and to suppress the influence of interference frequencies are outlined. In addition to these fundamental factors, another focus is on the efficient automation of the measurement process.

Phanish Chava received his MSc and PhD from TU Dresden, specializing in nano- and microelectronics, in 2018 and 2025, respectively. He subsequently worked as a postdoctoral researcher at Forschungszentrum Jülich for three years, where he focused on cryogenic measurement and modeling of advanced transistor nodes. In 2026, he joined Admos as the CTO, where he leads the development of transistor models and noise measurement systems.

Noori Bni Lam (Telespazio Belgium for ESA)

Resilient RF navigation

×

Resilient navigation aims to ensure reliable positioning, navigation and timing (PNT) services under harsh conditions, including signal blockage and intentional jamming and spoofing attacks. The growing dependency on satellite navigation exposes vulnerabilities that can’t be mitigated by single-system solutions alone. Resilience is achieved through a system-of-systems approach combining GNSS with complementary technologies such as Low Earth Orbit PNT (LEO-PNT), enhanced Loran (eLoran), and Signals of Opportunity (SoOP). At the user segment, advanced receiver technologies – including controlled reception pattern antennas (CRPA), beamforming and multi-antenna processing – provide spatial interference suppression and improved signal robustness. By exploiting diversity across signals, spatial, frequencies, polarization and receiver architectures, resilient navigation enhances availability, integrity and continuity for safety-critical and emerging applications.

Noori Bni Lam received his first PhD from Delft University of Technology, the Netherlands, in the field of computational modeling in 2020 and his second PhD degree in the field of electronics and telecommunication from the University of Antwerp, Belgium, in 2021. Since 2022, he’s been a radio navigation engineer at the European Space Agency. His main areas of interest include resilient navigation, LEO-PNT, GNSS signal processing and beamforming techniques.

Hagen Marien (Magics)

Rad-hard-by-design clock generation and time measurement for the next wave of space constellations

×

The rapid expansion of space constellations is driving demand for radiation-hardened timing solutions that combine high performance with commercial scalability. Magics Technologies has pioneered a radiation-hardened-by-design (RHBD) methodology that delivers unprecedented TID tolerance – up to 100 Mrad(Si) – in standard CMOS processes, without sacrificing the electrical performance that modern satellite platforms demand.
This talk introduces Magics’ growing portfolio of rad-hard timing ICs, spanning clock generation, distribution and precision time-to-digital conversion. We highlight recent milestones validating our technology in real space environments, including the successful deployment of our MAG-TDC in a scientific instrument aboard the International Space Station.

Hagen Marien obtained his PhD in microelectronics in 2012 from the ESAT-MICAS group at KU Leuven. He brings over seven years of experience as an integrated-circuit designer and project leader, having worked at Ansem and later at Melexis. Throughout his career, he’s developed strong expertise in analog and mixed-signal IC design, team leadership and complex project execution. In 2019, he joined Magics, where he currently serves as chief operating officer. In this role, he leads the analog IC design team and oversees projects and product management for space-focused solutions, driving innovation in demanding environments.

Jan Bouwen (Nokia)

AI silicon: scaling, diffusion and diversification

×

Semiconductor innovations provided the foundation for earlier waves of the Digital Age: the World Wide Web, the mobile Internet and the cloud, and are now fueling the AI supercycle. The AI supercycle took off thanks to GPUs and high-bandwidth memory that enabled training at scale of transformer models. Right now, the widespread diffusion of AI across society and the economy redefines the AI supercycle as inference overtakes training as the dominating workload and cost per token becomes the defining metric. The growing variety in the shapes of AI inference workloads (eg model size, context length, interactivity) triggers a diversification in the AI accelerator landscape with custom AI silicon and the expansion of the memory pyramid for advanced efficiency. Looking forward, AI silicon will continue to diversify, catering to hybrid post-transformer models, adopting post-von Neumann architectures and enabling a distributed AI infrastructure from intelligent devices over AI grids to AI factories.

As a senior technology advisor in Nokia’s technology and AI organization, Jan Bouwen explores future technology trajectories enabled by the interplay of emerging device and cloud capabilities, novel media and application experiences, and networking infrastructure innovations. Over the past 25 years, he’s served in various roles covering research, technology vision and technology strategy in Alcatel-Lucent and Nokia. His current interests include generative media experiences, AI-native devices and physical AI, AI accelerator innovations and their combined impact on networking infrastructure and services.

Richard Visée (Systematic)

Fast, faster, fastest: hybrid magnetic field sensors for current sensing applications

×

For quite some time, the combination of on-chip sense coils and Hall-effect sensors has been explored in academic research, showing promising potential by breaking the traditional noise–speed tradeoff. For actual current sensor product designs, this is a promising architecture. However, the combination brings some challenges, of which some will be highlighted.

Richard Visée received his electrical engineering degrees from Delft University of Technology. After working as an analog design engineer for several years, with a strong focus on RF circuits, he co-founded Systematic. Besides working on many IC design projects in sensor readout and power conversion for more than two decades, he successfully developed Systematic’s Japanese business relations. As the CEO, he represents the company in its international customer base.

Jan Vandenbussche (Cochlear)

The journey to standard-of-care for cochlear implants – and the role of future technology and architectures

×

Every year, a substantial number of adults and seniors in developed economies who could benefit from a cochlear implant have instead been fitted with high-power hearing aids. Addressing this gap requires reducing barriers for recipients as well as for hearing care professionals. In particular, the technical complexity of cochlear implant systems must be abstracted away from recipients, audiologists and surgeons to support broader adoption and establish cochlear implants as the standard of care for severe hearing impairments.
To this end, innovation has increasingly focused on three key areas: improved hearing outcomes, ease of use and connected care. A shift toward more implant-centric hearing solutions has driven significant system-level architectural evolution, redistributing functionality across the implant and external components. This evolution enables optimized alignment of functionality and underlying technologies, supporting improved outcomes while simplifying clinical workflows and reducing the need for in-person follow-up through emerging connected-care capabilities.
This talk discusses the implications of these trends for system architecture and highlights selected technology choices and architectural considerations that have been revisited in response to this evolution, informed by advances in low-power integrated circuit design and system integration.

Jan Vandenbussche completed his PhD research in 2002 at the KU Leuven. His research work focused on the systematic design of analog IP blocks. He started his professional career at Ansem, where he ended up managing the ASIC design team. He joined CMOSIS in 2014, later acquired by AMS, leading the design offices in Antwerp, Portugal and Tokyo with a focus on global shutter CMOS image sensors for consumer and automotive. Since 2021, he’s been managing the hardware platform design team at Cochlear Belgium. His team is responsible for the ASIC development of the Cochlear implant products worldwide.

27 May 2026 | Mikrocentrum Veldhoven

27 May 2026

Mikrocentrum Veldhoven

Exhibition and conference on advanced chip development in the Low Countries, bringing together the RF, analog & mixed-signal and digital communities

Gold sponsors

Silver sponsor

Bronze sponsors

Premium partner

Plus partners

Partners

Program

Topics

RF committee

Analog & mixed-signal committee

Digital committee

09:00-09:15

Registration

09:15-10:00

Opening keynote

Wideband continuous-time ADCs for automotive applications – advances in high-performance ADCs

Lucien Breems (NXP)

10:00-10:30

Panel discussion

On the strategic and technological opportunities for the regional and European chip design and semicon industry

Representatives from ChipNL Competence Centre, Flanders Chips Competence Center, Wallonia Chips Competence Centre and Polaris-NGF

10:30-11:00

Break

11:00-11:30

PhD pitches

Towards passive, high-resolution terahertz imaging using a chessboard focal plane array integrated in 130-nm SiGe BiCMOS

Martijn Hoogelander (TU Delft)

Differential-mode characterization of multi-port passives up to 170GHz using independent single-ended two-port measurements

Remco Schalk (TU Eindhoven)

Benchmarking of on-wafer oscilloscope-based nonlinear characterization

Daanish Smellie (KU Leuven)

11:30-12:00

RF

Recent advances in reverberation chamber measurement techniques: from noise figure to radar waveform characterization

Anouk Hubrechsen (Antennex)

12:00-12:30

RF

From conductive components to phased array antennas: consistent, fast and accurate characterization techniques of nonlinear distortions

Marc Vanden Bossche (CNRood)

11:00-11:30

PhD pitches

A cryo-CMOS electron/nuclear spin controller with combined GHz/MHz drivers for color-center qubits

Mohamed Elbadry (TU Delft)

Towards the development of custom cryogenic CMOS circuits for the Einstein telescope

Alberto Gatti (KU Leuven)

A 12.8-GS/s time-interleaved sub-sampling ADC front end with 38-GHz input bandwidth and >39-dB SNDR for 1–32 GHz in 22-nm FDSOI

Josef Heel (UT)

11:30-12:00

Analog & mixed signal

Adaptive LC filter compensation in digital class-D amplifiers

Chris Lokin (MPS Axign)

12:00-12:30

Analog & mixed signal

How to measure low frequency noise and why does it matter?

Phanish Chava (Admos)

11:00-11:30

PhD pitches

HEMAIA: an accelerator-centric heterogeneous multi-accelerator SoC

Ryan Antonio (KU Leuven)

Chameleon: a multiplier-free temporal convolutional network accelerator for end-to-end few-shot and continual learning from sequential data

Douwe den Blanken (TU Delft)

An event-based digital compute-in-memory accelerator with flexible operand resolution and layer-wise weight/output stationarity

Nicolas Chauvaux (TU Delft)

11:30-12:00

Digital

AI silicon: scaling, diffusion and diversification

Jan Bouwen (Nokia)

12:00-12:30

Digital

Democratizing AI inference with digital in-memory computing

Ioannis Papistas (Axelera AI)

12:30-13:30

Lunch

13:30-14:00

RF

Next-generation signal and spectrum analyzers: dual-path architecture, integrated cross-correlation and wideband pre-selection